Converters of this description are frequently used for the direct or remote energization of components of telecommunication systems or the like. Such converters may also be inserted in a feedback circuit of a power supply as a means for controlling its output.
A conventional d-c/a-c converter of the transistorized type comprises a power transformer with a primary winding split into two halves each lying in series with a respective transistor whose emitters or collectors are interconnected at a junction point. A supply of direct current is connected between that junction point and a center tap of the primary to form a pair of substantially identical circuit branches for the alternate energization of the two primary halves upon conduction of the respective transistors. These transistors can be alternately saturated and cut off by an external source of driving pulses or by an oscillatory coupling including an ancillary transformer of the saturable-core type.
Even with careful selection of circuit components it is generally impossible to achieve a perfect symmetry of the two circuit branches and therefore an exactly balanced output voltage; a frequent cause of dissymmetry are differences in the storage times of the two transistors and possibly of their collector/emitter and base/emitter voltages on saturation.
A dissymmetry in the primary current gives rise to an undesired d-c component which may lead to a saturation of the power transformer during alternate half-cycles. Such saturation reduces the load impedance seen by one of the two switching transistors whereby that transistor is liable to break down, a risk aggravated by a rise in the operating temperature of the insufficiently loaded transistor with consequent shift of its conduction threshold and further intensification of the unbalance.
In order to minimize the danger of transistor breakdown, it is customary in such converters to insert limiting resistances in series with the primary of the power transformer and to dimension that transformer large enough to prevent its saturation under normal operating conditions. Even with these precautions, however, the aforementioned differences in storage times may cause objectionable distortions of the output voltage, particularly at elevated operating frequencies (e.g. on the order of 10 to 20 kHz) where a time difference of several microseconds may result in a d-c component amounting to 5-20% of the magnitude of the supply voltage.
It has already been proposed to sense the unbalance of the primary current by connecting a biasing winding of the aforementioned ancillary transformer across adjoining resistors in the two circuit branches to premagnetize the saturable core of this transformer in a manner tending to rebalance the transformer current by varying the ratio of the normally identical pulse widths of the trains of driving pulses fed to the respective transistor bases.